Input Variable Partitioning Method for Decomposition-Based Logic Synthesis targeted Heterogeneous FPGAs

Journal title

International Journal of Electronics and Telecommunications




vol. 58


No 1


Divisions of PAS

Nauki Techniczne


Polish Academy of Sciences Committee of Electronics and Telecommunications




DOI: 10.2478/v10177-012-0002-x ; eISSN 2300-1933 (since 2013) ; ISSN 2081-8491 (until 2012)


International Journal of Electronics and Telecommunications; 2012; vol. 58; No 1


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