Applied sciences

International Journal of Electronics and Telecommunications


International Journal of Electronics and Telecommunications | 2010 | vol. 56 | No 2 |


Comparison of Evolutionary Algorithm and Heuristics for Flow Optimization in P2P Systems Nowadays, many Internet users make use of Peer-to-Peer (P2P) systems to download electronic content including music, movies, software, etc. Growing popularity in P2P based protocol implementations for file sharing purposes caused that the P2P traffic exceeds Web traffic and in accordance with to many statistics, P2P systems produce a more than 50% of the whole Internet traffic. Therefore, P2P systems provide remarkable income for Internet Service Providers (ISP). However, at the same time P2P systems generates many problems related to traffic engineering, optimization, network congestion. In this paper we focus on the problem of flow optimization in P2P file sharing systems. Corresponding to BitTorrent-based systems behaviour, the optimization of P2P flows is very complex and in this work we consider different heuristic strategies for content distribution and moreover we propose a new evolutionary algorithm (EA) for this problem. We compare results of the algorithms against optimal results yielded by CPLEX solver for networks including 10 peers and relation to random algorithm for 100-node systems. According to numerical experiments, the EA provides solutions close to optimal for small instances and all of the heuristics exhibit a superior performance over random search.
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Evaluation Scheme for NoC-based CMP with Integrated Processor Management System With the opportunities and benefits offered by Chip Multiprocessors (CMPs), there are many challenges that need to be addressed in order to exploit the full potential of CMPs. Such aspects as parallel programs, interconnection design, cache arrangement and on-chip cores allocation become a limiting factor. To ensure validity of approaches and research, we propose an evaluation system for CMPs with Network-on-Chip (NoC) and processor management system integrated on one die. The suggested experimentation system is described in details. The proposed system that is used for tests and results of the experiments are presented and discussed. As decision making criteria, we consider energy efficiency of Processor Allocator (PA) and NoC, as well as NoC traffic characteristic (load balance). In order to improve the system understanding, brief overview on most important NoC and PA architectures is also presented. Analyzed results reveal that CMP with a PA controlled by IFF allocation algorithm for mesh systems and torus-based NoC driven by DORLB routing with express-virtual-channel flow control achieved the best traffic balance and energy characteristic.
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Editorial office

Ryszard S. Romaniuk, Warsaw University of Technology, Institute of Electronic Systems, Poland

Managing Editor
Danuta Sobczak-Bartosiewicz, Warsaw University of Technology, Poland

Technical Editors
Grzegorz Borowik, Warsaw University of Technology, Institute of Telecommunications, Poland
Maciej Linczuk, Warsaw University of Technology, Institute of Electronic Systems, Poland

Secretary in-Charge
Danuta Ojrzenska-Wojter, Warsaw University of Technology, Institute of Telecommunications, Poland

Administrative Assistant
Danuta Sobczak-Bartosiewicz, Warsaw University of Technology, Poland

Technical Secretary
Michał Ramotowski, Warsaw University of Technology, Poland

Editorial Advisory Board
Prof. Victor-Valeriu Patriciu, Director Doctoral School of Electronics, Informatics and Communications for Defense and Security, Military Technical Academy Bucharest, Romania, Romania

Prof. Bart Scheers, Royal Military Academy, Belgium

Dr. Eli Winjum, Norwegian Defence Research Establishment, Norway

Wladyslaw Skarbek, Warsaw University of Technology, IRE, Poland

Christian Napoli, University of Catania, Italy

Rosario Giunta, University of Catania, Italy

Christopher Chiu, University of Technology Sydney, Australia

Prof. Emiliano Tramontana, University of Catania, Italy

Prof Robin Braun, University of Technology Sydney, Australia

Dr David Davis, University of Technology Sydney, Australia

dr Brian Culshaw, University of Strathclyde, UK, United Kingdom

Grzegorz Chmaj, University of Nevada, United States

Giuseppe Pappalardo, University of Catania, Italy

Michael Affenzeller, University of Applied Sciences Upper Austria

Prof. Stavros Hatzopoulos, Laboratory of Hearing Science Audiology Dept., University of Ferrara, Italy, Italy

Prof Nikita M Ryskin, Saratov State University, Russian Federation

Prof. Adam Wolisz, Technische Universität Berlin, Department of Electrical Engineering and Computer Science Telecommunication Networks

Prof. Edmundo Monteiro, Departamento de Engenharia Informatica Universidade de Coimbra Portugal, Portugal

Prof. Zoubir Mammeri, IRIT, Université Paul Sabatier 118 Route de Narbonne F-31062 Toulouse Cedex 9 FRANCE, France

Dr Paul D Polishuk, IGI, Boston, MA, USA

Giuseppe Macchiarella, Politecnico di Milano,Dipartimento di Elettronica, Informazione e Bioingegneria (DEIB), Italy

Prof. Bernd Steinbach, Bergakademie Freiberg Fakultät für Mathematik und Informatik Institut, Germany

Jan Szmidt, Warsaw University of Technology, Poland

Zenon Chaczko, University of Technology Sydney, Australia

Józef Modelski, Warsaw University of Technology, Poland

Wiesław Woliński, Warsaw University of Technology, Poland

Ryszard Klempous, Wroclaw University of Technology, Poland

Radomir Stanković, University of Niš, Serbia

Javier Poncela, University of Malaga, Spain

Marek Turowski, CFD Research Corporation, United States

Dawid Zydek, NV Energy, United States

Wojciech Szpankowski, Purdue University, United States

Jacek Żurada, University of Louisville, United States

Tadeusz Luba, Warsaw University of Technology, Poland

Stefan Hahn, Warsaw University of Technology, Poland

Gilbert De Mey, Ghent University, Belgium

Svetlana Yanushkevich, University of Calgary, Canada

Viktor Krozer, Technical University of Denmark, Denmark

Adam Morawiec, European Electronic Chips & Systems Design Initiative, France

Herman Rohling, Technical University of Hamburg, Germany

Franco Davoli, University of Genowa, Italy

Michał Mrozowski, Gdańsk University of Technology, Poland

Włodzimierz Janke, Koszalin University of Technology, Poland

Marek Amanowicz, Military University of Technology, Poland

Antoni Rogalski, Military University of Technology, Poland

Andrzej Materka, Technical University of Łódź, Poland

Henry Selvaraj, University of Nevada, United States



Principal Contact
Ryszard S. Romaniuk
Warsaw University of Technology, Institute of Electronic Systems, room 217, Nowowiejska 15/19, Warsaw 00-665, Poland
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Danuta Bartosiewicz



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