The paper presents a heuristic approach to the problem of analog circuit diagnosis. Different optimization techniques in the field of test point selection are discussed. Two new algorithms: SALTO and COSMO have been introduced. Both searching procedures have been implemented in a form of the expert system in PROLOG language. The proposed methodologies have been exemplified on benchmark circuits. The obtained results have been compared to the others achieved by different approaches in the field and the benefits of the proposed methodology have been emphasized. The inference engine of the heuristic algorithms has been presented and the expert system knowledge-base construction discussed.
The paper deals with a multiple fault diagnosis of DC transistor circuits with limited accessible terminals for measurements. An algorithm for identifying faulty elements and evaluating their parameters is proposed. The method belongs to the category of simulation before test methods. The dictionary is generated on the basis of the families of characteristics expressing voltages at test nodes in terms of circuit parameters. To build the fault dictionary the n-dimensional surfaces are approximated by means of section-wise piecewise-linear functions (SPLF). The faulty parameters are identified using the patterns stored in the fault dictionary, the measured voltages at the test nodes and simple computations. The approach is described in detail for a double and triple fault diagnosis. Two numerical examples illustrate the proposed method.
This paper deals with multiple soft fault diagnosis of nonlinear analog circuits comprising bipolar transistors characterized by the Ebers-Moll model. Resistances of the circuit and beta forward factor of a transistor are considered as potentially faulty parameters. The proposed diagnostic method exploits a strongly nonlinear set of algebraic type equations, which may possess multiple solutions, and is capable of finding different sets of the parameters values which meet the diagnostic test. The equations are written on the basis of node analysis and include DC voltages measured at accessible nodes, as well as some measured currents. The unknown variables are node voltages and the parameters which are considered as potentially faulty. The number of these parameters is larger than the number of the accessible nodes. To solve the set of equations the block relaxation method is used with different assignments of the variables to the blocks. Next, the solutions are corrected using the Newton-Raphson algorithm. As a result, one or more sets of the parameters values which satisfy the diagnostic test are obtained. The proposed approach is illustrated with a numerical example.
The paper deals with fault diagnosis of nonlinear analogue integrated circuits. Soft spot short defects are analysed taking into account variations of the circuit parameters due to physical imperfections as well as self-heating of the chip. A method enabling to detect, locate and estimate the value of a spot defect has been developed. For this purpose an appropriate objective function was minimized using an optimization procedure based on the Fibonacci method. The proposed approach exploits DC measurements in the test phase, performed at a limited number of accessible points. For illustration three numerical examples are given.
This paper presents a Kalman filter based method for diagnosing both parametric and catastrophic faults in analog circuits. Two major innovations are presented, i.e., the Kalman filter based technique, which can significantly improve the efficiency of diagnosing a fault through an iterative structure, and the Shannon entropy to mitigate the influence of component tolerance. Both these concepts help to achieve higher performance and lower testing cost while maintaining the circuit.s functionality. Our simulations demonstrate that using the Kalman filter based technique leads to good results of fault detection and fault location of analog circuits. Meanwhile, the parasitics, as a result of enhancing accessibility by adding test points, are reduced to minimum, that is, the data used for diagnosis is directly obtained from the system primary output pins in our method. The simulations also show that decision boundaries among faulty circuits have small variations over a wide range of noise-immunity requirements. In addition, experimental results show that the proposed method is superior to the test method based on the subband decomposition combined with coherence function, arisen recently.
This paper is devoted to multiple soft fault diagnosis of analog nonlinear circuits. A two-stage algorithm is offered enabling us to locate the faulty circuit components and evaluate their values, considering the component tolerances. At first a preliminary diagnostic procedure is performed, under the assumption that the non-faulty components have nominal values, leading to approximate and tentative results. Then, they are corrected, taking into account the fact that the non-faulty components can assume arbitrary values within their tolerance ranges. This stage of the algorithm is carried out using the linear programming method. As a result some ranges are obtained including possible values of the faulty components. The proposed approach is illustrated with two numerical examples.
A new soft-fault diagnosis approach for analog circuits with parameter tolerance is proposed in this paper. The approach uses the fuzzy nonlinear programming (FNLP) concept to diagnose an analog circuit under test quantitatively. Node-voltage incremental equations, as constraints of FNLP equation, are built based on the sensitivity analysis. Through evaluating the parameters deviations from the solution of the FNLP equation, it enables us to state whether the actual parameters are within tolerance ranges or some components are faulty. Examples illustrate the proposed approach and show its effectiveness.
This article presents combined approach to analog electronic circuits testing by means of evolutionary methods (genetic algorithms) and using some aspects of information theory utilisation and wavelet transformation. Purpose is to find optimal excitation signal, which maximises probability of fault detection and location. This paper focuses on most difficult case where very few (usually only input and output) nodes of integrated circuit under test are available.
This paper presents methods for optimal test frequencies search with the use of heuristic approaches. It includes a short summary of the analogue circuits fault diagnosis and brief introductions to the soft computing techniques like evolutionary computation and the fuzzy set theory. The reduction of both, test time and signal complexity are the main goals of developed methods. At the before test stage, a heuristic engine is applied for the principal frequency search. The methods produce a frequency set which can be used in the SBT diagnosis procedure. At the after test stage, only a few frequencies can be assembled instead of full amplitude response characteristic. There are ambiguity sets provided to avoid a fault tolerance masking effect.
While the Slope Fault Model method can solve the soft-fault diagnosis problem in linear analog circuit effectively, the challenging tolerance problem is still unsolved. In this paper, a proposed Normal Quotient Distribution approach was combined with the Slope Fault Model to handle the tolerances problem in soft-fault diagnosis for analog circuit. Firstly, the principle of the Slope Fault Model is presented, and the huge computation of traditional Slope Fault Characteristic set was reduced greatly by the elimination of superfluous features. Several typical tolerance handling methods on the ground of the Slope Fault Model were compared. Then, the approximating distribution function of the Slope Fault Characteristic was deduced and sufficient conditions were given to improve the approximation accuracy. The monotonous and continuous mapping between Normal Quotient Distribution and standard normal distribution was proved. Thus the estimation formulas about the ranges of the Slope Fault Characteristic were deduced. After that, a new test-nodes selection algorithm based on the reduced Slope Fault Characteristic ranges set was designed. Finally, two numerical experiments were done to illustrate the proposed approach and demonstrate its effectiveness.
Correct incipient identification of an analog circuit fault is conducive to the health of the analog circuit, yet very difficult. In this paper, a novel approach to analog circuit incipient fault identification is presented. Time responses are acquired by sampling outputs of the circuits under test, and then the responses are decomposed by the wavelet transform in order to generate energy features. Afterwards, lower-dimensional features are produced through the kernel entropy component analysis as samples for training and testing a one-against-one least squares support vector machine. Simulations of the incipient fault diagnosis for a Sallen-Key band-pass filter and a two-stage four-op-amp bi-quad low-pass filter demonstrate the diagnosing procedure of the proposed approach, and also reveal that the proposed approach has higher diagnosis accuracy than the referenced methods.