The paper deals with multiple soft fault diagnosis of analogue circuits. A method for diagnosis of linear circuits is developed, belonging to the class of the fault verification techniques. The method employs a measurement test performed in the frequency domain, leading to the nonlinear least squares problem. To solve this problem the Powell minimization method is applied. The diagnostic method is adapted to real circumstances, taking into account deviations of fault-free parameters and measurement uncertainty. Two examples of electronic circuits encountered in practice demonstrate that the method is efficient for diagnosis of middle-sized circuits. Although the method is dedicated to linear circuits it can be adapted to multiple soft fault diagnosis of nonlinear ones. It is illustrated by an example of a CMOS circuit designed in a sub-micrometre technology.
This paper deals with multiple soft fault diagnosis of nonlinear analog circuits comprising bipolar transistors characterized by the Ebers-Moll model. Resistances of the circuit and beta forward factor of a transistor are considered as potentially faulty parameters. The proposed diagnostic method exploits a strongly nonlinear set of algebraic type equations, which may possess multiple solutions, and is capable of finding different sets of the parameters values which meet the diagnostic test. The equations are written on the basis of node analysis and include DC voltages measured at accessible nodes, as well as some measured currents. The unknown variables are node voltages and the parameters which are considered as potentially faulty. The number of these parameters is larger than the number of the accessible nodes. To solve the set of equations the block relaxation method is used with different assignments of the variables to the blocks. Next, the solutions are corrected using the Newton-Raphson algorithm. As a result, one or more sets of the parameters values which satisfy the diagnostic test are obtained. The proposed approach is illustrated with a numerical example.
The paper deals with fault diagnosis of nonlinear analogue integrated circuits. Soft spot short defects are analysed taking into account variations of the circuit parameters due to physical imperfections as well as self-heating of the chip. A method enabling to detect, locate and estimate the value of a spot defect has been developed. For this purpose an appropriate objective function was minimized using an optimization procedure based on the Fibonacci method. The proposed approach exploits DC measurements in the test phase, performed at a limited number of accessible points. For illustration three numerical examples are given.
This paper is devoted to multiple soft fault diagnosis of analog nonlinear circuits. A two-stage algorithm is offered enabling us to locate the faulty circuit components and evaluate their values, considering the component tolerances. At first a preliminary diagnostic procedure is performed, under the assumption that the non-faulty components have nominal values, leading to approximate and tentative results. Then, they are corrected, taking into account the fact that the non-faulty components can assume arbitrary values within their tolerance ranges. This stage of the algorithm is carried out using the linear programming method. As a result some ranges are obtained including possible values of the faulty components. The proposed approach is illustrated with two numerical examples.